Verification Engineer salaries in Bitton, GLS

You will guarantee all these products function well with each other and with the software to enable our partners to develop outstanding systems.

£97,300 - £131,700 a year

10 days ago

At least 3-5 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM. Work on debug failing test cases to root cause.

At least 1-2 years of experience in Verification Engineering, with hands-on exposure to System Verilog - UVM (academic, internship, or professional experience).

Our UK design centres in Cambridge and Bristol, launched in early 2022, are driving innovation in cutting-edge RISC-V CPU development. The impact you’ll make.

Ensure test benches meet sign-off targets, including coverage and functional safety requirements. Strong understanding of verification concepts and System…

Our intellectual property encompasses RTL, reference drivers, tools, and libraries, enabling our customers to build upon our work to create innovative products!

£126,200 - £170,800 a year