Verification Engineer salaries in Bradford-on-Avon, WIL

Handling calls, emails and support cases for customers and keeping them updated on progress of issues and queries. A few things to note*.

£26,000 - £28,000 a year

At least 3-5 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM. Work on debug failing test cases to root cause.

At least 1-2 years of experience in Verification Engineering, with hands-on exposure to System Verilog - UVM (academic, internship, or professional experience).

Collaborate with other engineers in a team responsible for the delivery of all verification activities related to a component or subsystem from start to finish.

Our intellectual property encompasses RTL, reference drivers, tools, and libraries, enabling our customers to build upon our work to create innovative products!

£126,200 - £170,800 a year

Ensure test benches meet sign-off targets, including coverage and functional safety requirements. Strong understanding of verification concepts and System…