Verification Engineer salaries in Chilcompton, SOM

Handling calls, emails and support cases for customers and keeping them updated on progress of issues and queries. A few things to note*.

£26,000 - £28,000 a year

11 days ago

At least 3-5 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM. Work on debug failing test cases to root cause.

Our technologies enable innovation across industries, helping customers push the boundaries of science and technology. 25 days annual leave + half-day Fridays.

Contribute to the continuous improvement of platforms and processes, creating and validating dashboards and queries while staying up to date with platform…

Building and inspecting our products. The successful applicant will also be able to demonstrate an example of an electronic or mechanical project that they have…

£26,500 a year

At least 1-2 years of experience in Verification Engineering, with hands-on exposure to System Verilog - UVM (academic, internship, or professional experience).