Software architect Work, Jobs in Pilsley, Dby (with Salaries)

Staff Design Engineer
Arm —Sheffield
- £97,300 - £131,700 a year
- Hybrid work
- Doctoral degree
- Engineering
- Master's degree
11h
Senior Software Engineer – Edge Compute & Computer Vision
Kappture —Derby
- Hybrid work
- Software troubleshooting
- Travel
- Mentoring
- Annual leave
11h
Domain Expert - Data Governance, Stewardship & Information Management
Methods Business and Digital Technology —Sheffield
- Full-time
- Hybrid work
- Azure
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Quick apply
Senior Verification Engineer
Arm —Sheffield
- £73,500 - £99,500 a year
- Hybrid work
- Computer Science
- Master's degree
- Bachelor's degree
Senior Ruby Engineer
Hulcan —Sheffield
- Full-time
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Methods Business and Digital Technology —Sheffield
- Full-time
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Senior Project Manager - Construction Consultancy
Turner & Townsend —Sheffield
- Full-time
- PMP
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Senior Full Stack Software Engineer AI Native Engineering
Kappture —Derby
- Hybrid work
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12h
Senior CPP Software Engineer
Kappture —Derby
- Hybrid work
- Software troubleshooting
- Travel
- Mentoring
- Annual leave
12h

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Senior Software Engineer – Edge Compute & Computer Vision
Kappture —Derby
Experience in high-volume hospitality, retail or operational technology. Document firmware, driver, model, application and configuration dependencies.
11h

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Staff Design Engineer

Arm -
Sheffield

Apply Now

Job details

£97,300 - £131,700 a year
11 hours ago

Qualifications

Doctoral degree
Engineering
Electronics Engineering
Master's degree
Verilog
Bachelor's degree
GitHub
Multidisciplinary collaboration
ARM
SystemVerilog
Electrical Engineering
Communication skills

Full job description

Job ID 2026-18311 Date posted Aug. 12, 2026 Location Cambridge, United Kingdom; Manchester, United Kingdom; Bristol, United Kingdom; Sheffield, United Kingdom Category Design Engineering

Staff Subsystem Design Engineer

Job Overview

Arm’s IP and Technology team in Solutions Engineering department evelop subsystem solutions and SoC IPs for next-generation systems targeting Edge AI, Physical AI and Cloud AI. We work across Arm, bringing together the latest Arm technologies and selected third-party IP, as well as developing our own IP where needed, to deliver highly integrated and optimized solutions.

We are looking for an experienced, motivated and creative Staff Subsystem Design Engineer with a strong background in RTL, IP design and subsystems. You will work on challenging subsystem designs, developing microarchitectures, designing and integrating IP, and solving complex engineering problems across power, performance, area and implementation.

You will work with a diverse, global group of engineers and collaborate across architecture, verification, implementation and other technology teams to deliver high-quality designs.

Responsibilities

As a Staff Subsystem Design Engineer, you will be involved in the specification, microarchitecture, RTL design and integration of complex IPs and compute subsystems.

Your key responsibilities will include:

Analyse architectural and system specifications, understand implementation challenges and collaborate with architects to refine solutions.

Develop subsystem and IP microarchitecture specifications from high-level requirements.

Design new IP and subsystem logic where required, as well as integrate existing Arm and third-party IP into complete subsystem solutions.

Understand IP functionality, interfaces and system-level interactions to ensure robust integration within the subsystem.

Develop and maintain design intent, including UPF and timing constraints, where applicable.

Perform and drive design quality checks including Lint, CDC, RDC, X-propagation, synthesis and other static design checks.

Navigate architectural and implementation trade-offs and clearly articulate the rationale behind design decisions.

Work closely with verification teams to review test plans, support verification and debug complex design issues.

Collaborate with implementation, performance and power teams to ensure designs meet functional, timing, area, power and performance requirements.

Improve design methodologies and flows to address evolving subsystem and IP development needs.

Plan and drive your work to ensure high-quality and timely delivery.

Provide technical guidance, design reviews and support to other engineers while contributing effectively as part of the wider team.

Required Skills and Experience

In addition to holding a Bachelor's, Master's or PhD degree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related discipline, you will have 10+ years of relevant industry experience and demonstrate:

Extensive hands-on experience in digital RTL design and microarchitecture development using SystemVerilog and/or Verilog.

A strong delivery record of sophisticated IP or RTL subsystem designs.

Deep understanding of RTL design techniques and methodologies for complex subsystem and SoC development.

Ability to analyse high-level specifications and translate them into efficient and robust microarchitectures.

Familiarity with industry-standard EDA tools and methodologies.

Experience with static design checks including Lint, CDC, RDC and X-propagation.

Experience with synthesis, timing analysis and power-management techniques.

Understanding of low-power design methodologies, including UPF, clock/power gating and multiple power domains.

Ability to navigate performance, power, area, timing and complexity trade-offs and clearly articulate the rationale behind engineering decisions.

Knowledge of on-chip protocols and interfaces including AMBA AXI, APB and streaming interfaces.

Strong understanding of computer architecture and processor-based systems.

Knowledge of AI-powered software development tools and scripting workflows, including AI coding assistants such as Codex, GitHub Copilot, or equivalent technologies.

Excellent communication, collaboration and teamwork skills.

A self-driven and motivated approach, with the ability to take ownership of complex technical problems and drive them to completion.

Nice to Have Skills and Experience

Experience with Arm-based designs, Arm System Architectures and AMBA protocols.

Experience with advanced low-power RTL design and power-aware verification, including power/clock gating, retention and DVFS.

Proficiency with SystemVerilog Assertions (SVA) and formal verification techniques, and UVM

Knowledge of Functional Safety methodologies and safety-related hardware design.

Experience developing or improving RTL, IP and subsystem design flows and methodologies.

High-level programming experience such as C/C++.

In Return

You will have the opportunity to apply your engineering experience to challenging subsystem and IP design problems, working with teams across Arm to develop technologies for the next generation of AI systems.

You will be part of a diverse global engineering organization where you can develop new IP & influence subsystems microarchitecture and create highly optimized designs, while helping advance the performance and power efficiency of future system

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Salary Range:

£97,300

£131,700

per year

Apply Now

Refine Your Search

software architect jobs in pilsley, dby

Staff Design Engineer

Senior Software Engineer – Edge Compute & Computer Vision

Domain Expert - Data Governance, Stewardship & Information Management

Senior Verification Engineer

Senior Ruby Engineer

Domain Expert - Responsible AI, Ethics & Assurance

Senior Project Manager - Construction Consultancy

Senior Full Stack Software Engineer AI Native Engineering

Senior CPP Software Engineer

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