Overview
The School of Electrical and Electronic Engineering seeks to appoint a Lecturer (equivalent to Assistant Professor) in Microelectronic Systems Design and Implementation, with specific expertise in microelectronic systems architecture and digital implementation. We are seeking a systems architect with deep implementation understanding capable of leading architectural decisions across SoC design, sensor integration, data conversion, hardware-software co-design, and the partitioning of mission workloads under power, thermal and system technology co-optimisation (STCO) constraints. The remit spans on-chip integration through to board-level integration in heterogeneous systems, supported by hands-on implementation experience across digital VLSI, embedded systems, low-level firmware, and where relevant, high-speed PCB design.
We are particularly interested in candidates with experience of designing, implementing and validating digital integrated circuits, subsystems or board-level integrated platforms, including participation in silicon tape-outs through industrial product development or academic multi-project-wafer programmes (e.g. Europractice, eFabless, TinyTapeout), and substantive high-speed PCB design and integration where the heterogeneous-integration boundary extends to board level. Experience that combines architectural decision-making with hands-on implementation is particularly welcomed; expertise spanning sensor integration and data conversion, processor or accelerator architecture, debug and telemetry, hardware-software co-design, or low-level firmware development is valued.
We are advertising two related lectureships in parallel as part of this recruitment round: this post in Microelectronic Systems Design and Implementation, and an affiliated post in Analogue and Mixed-Signal IC Design. Candidates whose interests and experience span both areas are welcome to apply for both positions.
We particularly welcome applicants whose careers have bridged from computer architecture, embedded systems, FPGA-based research, computing or accelerator design, hardware-software co-design, low-power systems, sensor or quantum systems design, high-speed PCB or board-level systems integration, or related hardware-systems backgrounds into integrated semiconductor systems. To be clear: the focus is on the systems-and-implementation direction, translating architectural intent into deployable circuits, subsystems and integrated semiconductor systems, rather than novel process or device development.
Your home in the School. You will join the Microelectronics and Integrated Semiconductor Systems Expertise Theme within the Semiconductor and Quantum Technologies Research Theme. This is one of the UK's largest and most successful research environments spanning semiconductor devices, integrated circuits, heterogeneous integration, system co-design and integrated semiconductor systems, with longstanding partnerships across UK and international industry, extensive experimental facilities, and a sustained record of industrial collaboration.
The theme hosts Sheffield's leadership role and the Engineering and Innovation Office for the newly established national Innovation and Knowledge Centre in Heterogeneous Integration, CHIMES², the Centre for Heterogeneous Integrated MicroElectronic and Semiconductor Systems, supported by £16.3M over five years. CHIMES² is led by the University of Sheffield and brings together partner universities including Cambridge, Oxford, Edinburgh, Manchester, Newcastle, Strathclyde, Queen's University Belfast and King's College London, alongside the Science and Technology Facilities Council. Industrial partners include, among others, Imec, Arm, Pragmatic, Cadence, Synopsys and Siemens EDA.
Within CHIMES², analogue and mixed-signal IC design is a critical enabler for the heterogeneous integrated systems the centre aims to deliver the capability that brings novel device, packaging and integration advances together into deployable systems.
This is an academic lectureship centred on building your own internationally recognised research programme, contributing to teaching across our undergraduate and postgraduate programmes, and supervising doctoral students. CHIMES² provides a powerful national platform to accelerate that research career, and the successful candidate will, in turn, contribute substantively to CHIMES² delivery. We expect applicants to have a strong academic track record, and the potential to conduct world-class research, in one or more of the following:
Microelectronic systems architecture, SoC architecture, sensor integration, data conversion, hardware-software co-design and low-level firmware.
Digital VLSI implementation, RTL design, verification and test strategies.
Embedded systems, computer architecture and reconfigurable computing, including FPGA-based research.
Power, thermal and system technology co-optimisation (STCO); debug and telemetry; and low-power, secure and resilient design.
Mission-aware workload partitioning and integration-aware hardware acceleration — domain-specific architectures developed in the context of mission constraints rather than throughput in isolation.
Design for heterogeneous integration, including chiplet-based systems, interposer design, and high-speed PCB integration, addressing thermal, signal-integrity and EMI constraints across the integration boundary.
We recognise that no individual candidate will necessarily span all of these areas.
Strong expertise in microelectronic systems architecture and digital implementation is essential; complementary expertise in one or more of the areas above is welcomed.
Beyond CHIMES². As a Lecturer you will also support the School’s wider strategic objectives by:
- Enhancing our research capability in microelectronics and chip design, and supporting and improving teaching quality and student experience across undergraduate and postgraduate programmes in the school.
- Strengthening partnerships with industry, government, and research organisations across computing and consumer electronics, AI, data, automotive, telecommunications, healthcare and biomedical devices, energy, defence and security, and aerospace sectors.
Main duties and responsibilities
This is an opportunity to join a School in a world-class research-intensive university. In your role as a Lecturer, you will contribute to the School through the following duties and responsibilities:
Research
Conduct personal research of international standing independently and collaboratively.
Maintain a strong academic and professional profile through national and international engagement and high-quality publications.
Develop an internationally leading research programme and engage with industry and policy partners to shape the future of engineering and science.
Secure external funding to support future research activity and build an independent research group, including the supervision of PhD students to successful completion.
Teaching
Design, develop, and deliver teaching on modules across a range of undergraduate and postgraduate programmes, including coordinating team teaching to ensure high-quality delivery; preparing teaching materials; communicating subject matter; and encouraging critical discourse and rational thinking.
Carry out module assessments, including designing assessment instruments and criteria; marking assessments, ensuring adequate moderation; providing written/oral feedback; and collating and issuing final student assessments.
Supervise and assess UG and PG dissertation students.
Carry out module evaluation, including facilitating student feedback, reflecting on own teaching design and delivery, and implementing ideas to improve own performance.
Leadership
Contribute to the life of the School, Faculty and wider University community by taking on leadership roles and responsibilities where required, and contributing to committee work and the development of relevant policies.
Make ethical decisions in your role, modelling inclusive and collegiate behaviour, and embedding the University’s sustainability strategy into your working activities wherever possible.
Contribute fully as a researcher, teacher and leader, fulfilling the appropriate requirements of the University’s Academic Career Pathway Framework (ACP).
Person Specification
Our community welcomes diverse backgrounds and experiences. We particularly encourage applications from candidates currently working in industrial R&D environments who are seeking to transition into academia, and from candidates whose research has bridged computer architecture, embedded systems, FPGA-based research, accelerator design, hardware-software co-design, or board-level systems integration into integrated semiconductor systems. Even if your past experience doesn’t match perfectly with this role’s criteria, your contribution is valuable, and we encourage you to apply. Please ensure that you reference the application criteria in the application statement when you apply.
Applicants must provide the following documents when making their application - Please upload a merged PDF document under the cover letter section on our application system:
CV (including a list of publications)
Research Vision Statement
Teaching Vision Statement
A statement of published outputs in which you identify your three best peer reviewed publications. For one of these you should provide a short statement of no more than 100 words describing the originality, significance and rigour (the extent to which the purpose of the work is clearly articulated, an appropriate methodology for the research area has been adopted, and compelling evidence presented to show that the purpose has been achieved) of the paper.
For candidates from industry, evidence of research outputs and achievements which demonstrate the skills required to publish high quality research in the future, e.g. technical reports.
Have completed or be near to completion of a PhD (or have equivalent experience) in a relevant research area related to microelectronic systems design, digital VLSI, computer architecture, embedded systems, or closely related integrated semiconductor systems engineering. Candidates with backgrounds in adjacent hardware-systems areas (computing or accelerator design, FPGA-based research, low-power systems, sensor or quantum systems design, high-speed PCB or board-level systems integration) are welcome where they can demonstrate clear experience of systems architecture and digital implementation; pure systems-software or novel-device research without an integrated-systems implementation component is outside the scope of this post.
Research experience and reputation commensurate with career stage and role as evidenced by a good publication record in peer-reviewed journals or, for candidates from industry, evidence of research outputs and achievements which demonstrate the skills required to publish high-quality research in the future, e.g. technical reports.
Ability/potential to develop and lead an independent research group in a relevant research area.
Experience of formal/informal supervision of students, technical staff and/or research staff.
Ability to develop, deliver and assess high-quality teaching at a variety of levels.
Being able to communicate well, conveying ideas and concepts clearly and effectively as well as a high level of analytical capability.
Good leadership skills and ability to work in a multidisciplinary team.
Being supportive and tolerant when communicating and working with colleagues, students and external collaborators.
Familiarity with industry-standard EDA tools (e.g. Cadence, Siemens EDA, Synopsys) and/or open-source equivalents.
Demonstrated experience leading or contributing meaningfully to the architecture, implementation and verification of digital integrated circuits, subsystems or board-level integrated platforms — including participation in at least one silicon tape-out, MPW shuttle, equivalent industrial design cycle, or substantive high-speed PCB integration project. Experience with SoC architecture, sensor integration, data conversion, hardware-software co-design, debug and telemetry, power/thermal/STCO tradeoffs, or other digital systems domains is also valued.
Experience of preparing research funding applications for submission, including clear and feasible plans to secure research income from a variety of funding streams.
Knowledge of design-for-test (DFT) methodologies, verification strategies and test/debug architectures for digital and integrated systems, including familiarity with industry-standard verification methodologies (e.g. UVM, formal verification) and post-silicon characterisation.
Experience leading the delivery of a tape-out programme, silicon demonstrator, or integrated hardware development project from specification through post-silicon characterisation.
Broad knowledge of integrated system components, including digital subsystems, embedded processors, and analogue/mixed-signal interfaces. Understanding of system-level integration, hardware-software co-design, and the architecture-implementation interface. Awareness of packaging and integration pathways (e.g. SiP, chiplet-based design, advanced packaging) is desirable. Experience applying AI/ML to EDA workflows is a benefit, but real silicon implementation and validation experience takes precedence.
Further Information
£48,822-£58,225 per annum (with the potential to progress to £65,509 per annum through sustained excellent contribution)
https://sheffield.ac.uk/eee
For informal enquiries about this job contact Professor John Goodenough via email at
[email protected] Next steps in the recruitment process
It is anticipated that the selection process will take place during September - Early October. There will be two stages of selection, the initial selection stage will include a presentation to academic colleagues and meetings with academic staff (anticipated dates for these are 28 and 29 September), successful candidates will then be invited to an interview (anticipated date 12 October). We plan to let candidates know if they have progressed to the initial selection stage on the week commencing 14 September 2026.
If you need any support, equipment or adjustments to enable you to participate in any element of the recruitment process you can contact Rebecca Fieldsend by email at
[email protected].
Our vision and strategic plan
We are the University of Sheffield. This is our vision: sheffield.ac.uk/vision ().
What we offer
A minimum of 41 days annual leave including bank holiday and closure days (pro rata) with the ability to purchase more.
Flexible working opportunities, including hybrid working for some roles.
Generous pension scheme.
A wide range of discounts and rewards on shopping, eating out and travel.
A variety of staff networks, providing opportunities for social interaction, peer support and personal development (for example, Race Equality, LGBT+, Women’s and Parent’s networks).
Recognition Awards to reward staff who go above and beyond in their role.
A commitment to your development access to learning and mentoring schemes; integrated with our Academic Career Pathways
A range of generous family-friendly policies
paid time off for parenting and caring emergencies
support for those going through the menopause
paid time off and support for fertility treatment
and more
Information for international candidates and the support that the University provides is available on this page: https://sheffield.ac.uk/jobs/induction/before/international.
Information on relocation support offered by the University is available on this page: https://sheffield.ac.uk/jobs/induction/removal-expenses .
We are a Disability Confident Employer. If you have a disability and meet the essential criteria for this job you will be invited to take part in the next stage of the selection process.
