R&d development engineer Work, Jobs in Baldock, Hrt (with Salaries)

Graduate Verification Engineer
Riverlane —Cambridge
- £37,000 - £40,000 a year
- Full-time
- Computer Science
- Engineering
- Master's degree
- Annual leave
- Life insurance
Quick apply
Senior R&D Electronics Engineer
Xylem —Cambridge
- Full-time
- Business development
- Travel
Software Engineering Manager - Air Traffic Management Systems (ATMS)
Raytheon —Harlow
- Full-time
- Hybrid work
- Computer Science
- Engineering
- Team management
- Sick pay
4d
Senior Software Architect
Mettler Toledo —Cambridge
- Machine learning
- Mentoring
- AI
- Annual leave
Area Sales Manager
Bourns —Bedford
- Business development
5d
(UK)Senior Engineer - AI Core services
Codvo.ai —Cambridge
- Azure
- Product management
- Mentoring
Senior Software Engineer, AI Services
Aveva —Cambridge
- Full-time
- Hybrid work
- Azure
- Machine learning
- Mentoring
- Annual leave
Lead Quantum Error Correction Researcher
Riverlane —Cambridge
- £72,000 - £140,000 a year
- Part-time
- Doctoral degree
- Computer Science
- C++
- Annual leave
- Life insurance
Quick apply
Field Service Engineer UPS - Data Center Solutions
Delta Electronics —Hemel Hempstead
- Full-time
- Engineering
- English
- Continuous improvement
Quick apply
Principal Bioinformatician
Tagomics —Cambridge
- Full-time
- Hybrid work
- Doctoral degree
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Scientist - Biotechnology
Smiths Detection —Hemel Hempstead
- Full-time
- Doctoral degree
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13h
Mechanical Engineering Leader
Honeywell —Luton
- Full-time
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13h
Regional Service HSE Manager (Europe & Africa)
Smiths Detection —Hemel Hempstead
- Full-time
- Travel
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Graduate Verification Engineer

Riverlane
Cambridge

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Job details

Permanent | Full-time
£37,000 - £40,000 a year

Benefits

Annual leave
Company pension
Private medical insurance
Life insurance

Qualifications

Computer Science
Engineering
Master's degree
Verilog
OOP
Bachelor's degree
Multidisciplinary collaboration
SystemVerilog
Electrical Engineering
Communication skills
Debugging

Full job description

Cambridge, UK | Full-time | Permanent | Hybrid

Salary: £37,000 - £40,000

About us

Riverlane's mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry's defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.

Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world's leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We're making remarkable progress and growing fast.

About the role

We have an exceptional opportunity for a Graduate Verification Engineer to join our talented team of hardware designers and embedded software engineers. Together, you'll deliver fully verified, high-performance, and trusted systems.

In this exciting role you'll have end-to-end visibility across the entire stack, owning different aspects of verification and shaping how quality and reliability are built into our cutting-edge technology. You do not need a background in quantum computing! You will learn this along the way.

What you will do - specific responsibilities:

As a Graduate Verification Engineer at Riverlane, you will:

Help with developing and executing verification plans for hardware blocks in Quantum Error Correction Systems
Learn and support the creation of testbenches using SystemVerilog and UVM
Run simulations and perform debugging to resolve issues in collaboration with the design team
Collaborate with multi-disciplinary teams to understand specifications and define verification strategies for Quantum Error Correction systems
Learn and apply best practices in verification to make methodology improvements

What we need - Essential Skills/Experience:

Bachelor's or Master's degree in Electrical Engineering, Computer Science or related discipline
Understanding of Digital Logic Design
Some familiarity with HDL languages (e.g. Verilog, SystemVerilog) and simulation tools
Good communication and problem-solving skills

Even better if you have…

Relevant academic projects/internships/work experience
Exposure to scripting languages such as Python
Understanding of Object-Oriented Programming
Exposure to UVM

What can you expect from us

A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme

Equity, so that our team can share in the long-term success of Riverlane

28 days annual leave, plus bank holidays and enhanced family leave

A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 20 different nationalities

A learning environment that encourages individual, team and company growth and development, including a regular programme of learning events and training and conference budgets

How to apply

Please upload a CV and covering letter by clicking 'Apply'. Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role.

We review CVs as we receive them and interview as soon as we have applications that look like a good match. We do not use closing dates. So, please apply as soon as possible to avoid missing out on this role.

If you have any queries, please contact [email protected].

Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity.

Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements. If this applies to you, we still encourage you to apply - you may be a great fit, even if you don't meet every single qualification. We'd love to hear from you.

If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.

GDPR notice: Riverlane collects and processes personal data in accordance with applicable data protection laws. If you are a European Job Applicant see the privacy notice for further details.

Quick apply

Refine Your Search

r&d development engineer jobs in baldock, hrt

Graduate Verification Engineer

Senior R&D Electronics Engineer

Software Engineering Manager - Air Traffic Management Systems (ATMS)

Senior Software Architect

Area Sales Manager

(UK)Senior Engineer - AI Core services

Senior Software Engineer, AI Services

Lead Quantum Error Correction Researcher

Field Service Engineer UPS - Data Center Solutions

Principal Bioinformatician

Scientist - Biotechnology

Mechanical Engineering Leader

Regional Service HSE Manager (Europe & Africa)

Other jobs to consider

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