Principal mixed signal design verification, team lead Work, Jobs in Galashiels, Sct (with Salaries)

Principal Mixed Signal Design Verification, Team Lead
Allegro MicroSystems, LLC —Musselburgh
- Full-time
- Engineering
- Master's degree
- Bachelor's degree
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Home Basics —Walkerburn
- Up to £26,918 a year
- Temporary
- Social media management
- Presentation skills
- First Aid Certification
- Employee discount
Quick apply
New Product Alliances & Innovation Lead
AliveDx —Penicuik
- Full-time
- Doctoral degree
- Leadership
- Communication skills
Sr. Digital Design Engineer, Team Lead
Allegro MicroSystems, LLC —Musselburgh
- Full-time
- Doctoral degree
- Master's degree
- Travel
Associate Materials Team Manager
Plexus —Kelso
- Microsoft Excel
- Microsoft Office
- Analysis skills
- Annual leave
- Employee assistance programme
2d
253155 R1 (KMc) Occupational Therapy Team Lead
NHS Scotland —Lothian
- £52,845 - £61,466 a year
- Discharge planning
- Organisational skills
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251627 (SNIS) Clinical Team Lead - District Nursing
NHS Scotland —Lothian
- £52,845 - £61,466 a year
- Nursing
Team Leader - Fixed Term Contract - MHARS & Park Cottage
Penumbra —Newtongrange
- £14.39 - £15.81 an hour
- Full-time
- Leadership
- Communication skills
Team Manager – Learning Estate
East Lothian Council —Haddington
- £34.83 - £39.21 an hour
- Call to connect
- Hybrid work
- Project management
- In-person
- School
- Work from home
7d
Clinical Lead Nurse
QME Care (Queens House Kelso Ltd) —Kelso
- £25 an hour
- Part-time
- Driving
- In-person
- Leadership
- Free parking
- Health & wellbeing programme
Quick apply
2d
Principal Analog Design Engineer
Allegro MicroSystems, LLC —Musselburgh
- Full-time
- Doctoral degree
- Engineering
- Master's degree
Lead Nightshift Manager
Sainsbury's —Loanhead
- From £36,250 a year
- Night shift
- Management
- Leadership
- Employee discount
12d
Team Manager Nights - Dalkeith Hardengreen
Tesco UK —Dalkeith
- Full-time
- Communication skills
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14d
Care Team Leader
Sanctuary Care —Tranent
- £15.45 an hour
- Care plans
- Annual leave
- Employee assistance programme
Quick apply
Cleaner - Team Leader
Charles River Laboratories —Tranent
- £26,113.14 a year
- Full-time
- Sales
- Annual leave
Team Leader
ASDA —Prestonpans
- £13.10 - £14.10 an hour
- Weekend availability
- Communication skills
- Annual leave
- Employee assistance programme
12d

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principal mixed signal design verification, team lead jobs near galashiels, sct

Principal Mixed Signal Design Verification, Team Lead

Allegro MicroSystems, LLC -
Musselburgh

Apply Now

Job details

Full-time

Qualifications

Engineering
Master's degree
Bash (Unix shell)
OOP
Bachelor's degree
Perl
Scripting
SystemVerilog
Electrical Engineering
Leadership
GitLab
Python

Full job description

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.

The Opportunity

We are seeking a highly experienced and visionary Principal Mixed-Signal Design Verification (MSDV) Engineer & Team Lead to join our Edinburgh Design Center (EDC). In this critical leadership role, you will champion the verification of our next-generation Power ICs (including advanced Motor Drivers, PMICs, and Gate Drivers). You will lead a talented team of verification engineers, driving technical excellence from initial chip architecture down to final tape-out sign-off.

What You Will Do

In this role, you will be responsible for the end-to-end verification strategy, methodology, and team execution within our Power IC business line:

Team Leadership & Mentorship: Lead, develop, and mentor the Mixed Signal Verification Team
Methodology & Best Practices: Define and implement state-of-the-art mixed-signal verification methodologies—including pioneering the exploration and integration of AI-driven automation tools—to streamline the global verification flow.
Full-Cycle Verification Management: Own all aspects of design verification (MSDV) for complex mixed-signal ICs, executing the complete cycle from initial test planning to the final, tape-out-ready Verification Report.
Architectural Collaboration: Partner closely with Systems and Design Engineering teams to contribute to top-down chip architecture definitions and pre-design feasibility studies.
UVM/SystemVerilog Testbench Architecture: Architect and construct robust, scalable, object-oriented SystemVerilog/UVM testbenches (including Scoreboards, Sequencers, Drivers, and Monitors) and class objects to be easily reusable by the wider global team.
Requirements Traceability & Safety Compliance:
- Translate system requirements managed in Jama into automated verification tests
- Verify and document ISO 26262 Hardware Safety Requirements (ASIL compliance)
- Develop assertions (SVA) to enforce strict analog and digital boundaries.
Modeling & Netlisting: Train and guide engineers to interpret analog schematics, generate accurate behavioral models (amplifiers, comparators, gate drivers, oscillators, LDOs, ADCs/DACs), and generate top-level netlists for seamless simulation within Cadence Mixed-Signal environments
Regression & Issue Tracking: Establish automated regression flows and track pre-silicon design and verification issues utilizing GitLab as our primary engineering interface

What You Will Bring

Education: Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or a highly related technical field.
Core Experience:
- 8+ years of hands-on experience in Mixed-Signal Design Verification (MSDV). Strong background in power-related topologies (Motor Drivers, PMICs, Gate Drivers) is highly preferred.
- 4+ years of proven leadership experience, directly managing or leading verification teams through complex tape-out cycles.
Verification Planning & Tape-Out Execution: Proven track record of developing comprehensive full-chip verification plans, managing execution schedules, tracking regression metrics, and driving functional and code coverage closure for tape-out sign-off
Technical Expertise:
- Expertise in SystemVerilog, SVA (Assertions), and UVM methodologies.
- Proficiency in scripting languages (e.g., Python, Bash, Perl) to drive automation and efficiency.
- Strong familiarity with Cadence mixed-signal simulation environments.
Behavioral Modeling: Deep understanding of analog and mixed-signal blocks to guide the team in writing high-fidelity behavioral models (PLLs, Charge Pumps, Bandgaps, etc.).
People Development: A passion for coaching and developing junior-to-mid level engineers, helping them transition into independent, highly technical contributors.

Why Allegro?

Join Allegro and become part of a team where your contributions truly matter.

We foster a culture of Real Innovation, empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.
Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.
You’ll experience Real Connection, collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.
Join us—and help build what’s next.

Apply Now

Refine Your Search

principal mixed signal design verification, team lead jobs in galashiels, sct

Principal Mixed Signal Design Verification, Team Lead

Reuse & Community Workshop Lead

New Product Alliances & Innovation Lead

Sr. Digital Design Engineer, Team Lead

Associate Materials Team Manager

253155 R1 (KMc) Occupational Therapy Team Lead

251627 (SNIS) Clinical Team Lead - District Nursing

Team Leader - Fixed Term Contract - MHARS & Park Cottage

Team Manager – Learning Estate

Clinical Lead Nurse

Principal Analog Design Engineer

Lead Nightshift Manager

Team Manager Nights - Dalkeith Hardengreen

Care Team Leader

Cleaner - Team Leader

Team Leader

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