Verification Engineer salaries in Wales

Lead risk management activities (e.g. FMEA) and ensure compliance across development programmes. Define and lead test strategies to enable efficient, high-…

At least 3-5 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM. Work on debug failing test cases to root cause.

Crosstrain across other areas within Cwmbran test facility to provide strength in depth during absences, support laboratory customers and technicians, and…

Act as the first escalation and troubleshooting point for productivity vendor solutions (e.g., Microsoft), owning investigation and issue resolution for vendor…

Up to £28 an hour

You will guarantee all these products function well with each other and with the software to enable our partners to develop outstanding systems.

£73,500 - £99,500 a year

At least 1-2 years of experience in Verification Engineering, with hands-on exposure to System Verilog - UVM (academic, internship, or professional experience).