Architecture formal Work, Jobs in Bottisham, Cam (with Salaries)

Experienced IC Design Engineer
Raspberry Pi —Cambridge
- Full-time
- Bachelor's degree
- Scripting
- Python
Quick apply
ASIC Verification Engineer, Amazon Camera ASIC Team
Evi Technologies Limited —Cambridge
- Full-time
- Engineering
- Master's degree
- Bachelor's degree
Senior Formal Verification Engineer (CPU group)
Arm —Cambridge
- £73,500 - £99,500 a year
- Hybrid work
- Scripting
- Python
Lead Quality Assurance Engineer - FTC 6 Months
The Delta Group —Bishop's Stortford
- Hybrid work
- Azure
- Mentoring
- Scripting
Quick apply
Deputy Development Director
Fitzwilliam College —Cambridge
- Full-time
- Microsoft Office
- Master's degree
- Project management
- Free parking
- Annual leave
Senior Engineer
Arm —Cambridge
- £73,500 - £99,500 a year
- Hybrid work
- Engineering
- Master's degree
- Bachelor's degree
5d
Software Engineer (Rust)
CommonAI C.I.C. —Cambridge
- Full-time
- Bachelor's degree
- APIs
- Financial services
Quick apply
Staff Engineer
Arm —Cambridge
- £97,300 - £131,700 a year
- Hybrid work
- C++
- Communication skills
- Python
14d
Staff Design Verification Engineer
Advanced Micro Devices, Inc —Cambridge
- Engineering
- Master's degree
- Analysis skills
IC Verification Engineer
Raspberry Pi —Cambridge
- Full-time
- Bachelor's degree
- Communication skills
- Python
Quick apply
Functional Safety Engineer
Arm —Cambridge
- £55,300 - £74,800 a year
- Hybrid work
- Communication skills
2d

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Experienced IC Design Engineer

Raspberry Pi -
Cambridge

Quick apply

Job details

Full-time

Benefits

Company pension
Private medical insurance
Car scheme

Qualifications

FPGA
Bash (Unix shell)
SoC
C
Bachelor's degree
SDKs
Scripting
SystemVerilog
Python
Raspberry Pi

Full job description

Raspberry Pi is seeking an experience IC Design engineer to join our expanding ASIC team to help deliver our next-generation products. We have been building our own silicon at Raspberry Pi for some years now, starting with the RP2040 microcontroller in 2021, and following with the RP1 southbridge chip for the main Raspberry Pi platform on Raspberry Pi 5. Our second-generation microcontroller, RP2350, was released in 2024. The ASIC team looks after everything in the silicon flow, from specification through design, verification, and implementation, including ATE test and qualification. With a small team, we get involved in all aspects of getting successful products into production.

As an experienced design engineer, you will take ownership of front-end tasks from specification to design, verification, and implementation with support from specialists in other teams. You will be capable of both working autonomously and also dynamically with other members of the ASIC team. Your responsibilities will include:

Design, IP integration, verification planning and execution
Specifying and/or configuring IP and systems
Working closely with the software team
Supporting FPGA platforms for fast software development and verification
Assisting the implementation team with power and timing issues

Requirements

Key requirements

A good level of experience (typically 10+ years) in SoC or MCU architecture, with at least one tape-out where you held architectural ownership of a chip or non-trivial subsystem.
Deep understanding of modern microcontroller and processor design, including real-time behaviour, deterministic interrupt handling, low-power modes, flash/SRAM hierarchies, and common peripherals (e.g. SPI, I²C, UART, USB, PIO-style fabrics, ADC/DAC, timers).
Equally strong grasp of broader SoC concepts: coherent and non-coherent interconnect, AXI/AHB/APB, cache hierarchies, DMA, memory controllers, security architecture (TrustZone or equivalent), and how an OS-class subsystem coexists with real-time domains on the same die.
Fluent in the implementation reality of chips — RTL (SystemVerilog), verification methodology (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints. You do not need to be a specialist in each, but you need to be credible across all of them.
Track record of making good engineering trade-offs under real cost, schedule, and PPA pressure, and communicating them clearly to both engineers and non-engineers.
Comfortable working close to software: you have written non-trivial embedded C, understand toolchain and SDK implications of architectural choices, and care about what shipping the chip feels like for the developer using it.
Ability to communicate complex ideas, design goals, and status effectively both verbally and through documentation.
Strong drive and ability to work to a schedule.
Familiarity with scripting languages (Bash, Python, Tcl, etc)

The following would also be useful:

Experience of Cadence simulation tool flow.
Experience with ASIC/FPGA synthesis and implementation, DFT architecture and insertion, software development, and scripting.

The role is based in Cambridge with an expectation of full-time office attendance.

Benefits

Competitive salary based on level of experience
Employer pension contributions of 8% when the employee contributes 4% of their gross salary into the salary sacrifice scheme
Life assurance of 4 × base salary
Income protection of 75% of base salary in the event of critical illness, commencing after 13 weeks of long-term illness or absence from work
Private medical insurance (medical history disregarded)
Access to our electric vehicle salary sacrifice scheme, subject to eligibility

Quick apply

Refine Your Search

architecture formal jobs in bottisham, cam

Experienced IC Design Engineer

ASIC Verification Engineer, Amazon Camera ASIC Team

Senior Formal Verification Engineer (CPU group)

Lead Quality Assurance Engineer - FTC 6 Months

Deputy Development Director

Senior Engineer

Software Engineer (Rust)

Staff Engineer

Staff Design Verification Engineer

IC Verification Engineer

Functional Safety Engineer

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