Design verification engineer Work, Jobs in Hayes, Gtl (with Salaries)

Experienced AMS Design Verification Engineer
Apple —London
- Doctoral degree
- Engineering
- System design
Graduate Systems Engineer
Martin Baker Aircraft Company Ltd —Denham
- Full-time
- Hybrid work
- Analysis skills
- Mentoring
- Scripting
- Annual leave
- Employee discount
Quick apply
AI Business Partner - Builders
Janus Henderson —London
- Hybrid work
- Azure
- Master's degree
- Financial services
4d
Digital Design Verification – Application Engineer
Synopsys —Reading
- Engineering
- Bachelor's degree
- Electrical Engineering
KNX Onsite Commissioning Engineer
OKTO Integrated Services —London
- £500 a day
- Hospitality
- In-person
Quick apply
7d
Design Verification Engineer
Normal Computing Corporation —London
- £140,000 - £180,000 a year
- Full-time
- Hybrid work
- Travel
- Scripting
- Communication skills
Information Coordinator
Kier Group —Isleworth
- Part-time
- Microsoft Excel
- SharePoint
- Communication skills
- Flexible schedule
6d
Verification and Validation Engineer
Northrop Grumman —New Malden
- £55,000 - £65,000 a year
- Hybrid work
- Military
- Engineering
- Analysis skills
- Relocation assistance
FPGA Design Engineer
Leonardo UK Ltd —Luton
- £38,000 - £53,000 a year
- Full-time
- Hybrid work
- Flexible schedule
- Referral programme
CAD Technician
M Group —Sutton
- AutoCAD
- CAD
- Organisational skills
- Annual leave
Senior Systems Engineer
Baker Hughes —London
- Presentation skills
- Bachelor's degree
- Travel
- Flexible schedule
- Life insurance
Software Engineer IV
Indeed —London
- £98,000 - £148,000 a year
- Full-time
- Doctoral degree
- Computer Science
- Engineering
- Annual leave
- Life insurance
Quick apply
Senior Verification Test Engineer
CoMind —London
- £46,771 - £97,549 a year
- Full-time
- Analysis skills
- IT
- In-person
- Employee discount
Lead Design Quality Assurance Engineer - 12m Inside IR35 Contractor
Safran Engineering Services UK Limited —Pitstone
- Engineering
- Analysis skills
- Bachelor's degree
Quick apply
Staff GPU Hardware Design Engineer
Imagination Technologies —Kings Langley
- English
- Analysis skills
- C++
Field Application Engineering Manager - EDA - h/f
Siemens —London
- £93,700 - £211,500 a year
- Full-time
- Hybrid work
- Computer Science
- Up to 50% travel
- Engineering
14d
Experienced AMS Digital Design Engineer
Apple —London
- Doctoral degree
- Engineering
- Laboratory experience
Machine Learning Researcher
Wintermute Trading —London
- Full-time
- Computer Science
- C++
- Machine learning
- Relocation assistance
Graduate Systems Engineer
Martin-Baker —Denham
- Hybrid work
- Analysis skills
- Mentoring
- Scripting
- Annual leave
- Employee discount
2d
AI Engineering Lead
Normal Computing Corporation —London
- £250,000 - £340,000 a year
- Full-time
- Hybrid work
- Mentoring
- AI
- Leadership

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design verification engineer jobs near hayes, gtl

Experienced AMS Design Verification Engineer

Apple -
London

Apply Now

Job details

Qualifications

Doctoral degree
FPGA
Engineering
System design
English
Master's degree
Verilog
OOP
C++
SystemVerilog
AI
Python

Full job description

At Apple, we work daily to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and creative Design Verification Engineer. As a member of our Advanced Technology group, you will have the rare and rewarding opportunity to craft upcoming products, which will delight and encourage millions of Apple’s customers every single day.

Do your life’s best work here at Apple! This role is for a Design Verification Engineer who will enable bug-free first silicon for the mixed-signal designs in our NEW London team. The responsibilities include all phases of pre-silicon verification, including but not limited to: construction of verification environments, coding of test scenarios and assertions, and close collaboration with Analog and Digital Design engineers.

Description
Definition and design of Self-checking verification environments for multi-layer systems using the SystemVerilog UVM library. The responsibility spans from concept discussions, verification strategy definition and execution of the verification tasks to ensure bug-free tape-outs. The AMS DV engineer goes beyond standard verification techniques and include:

performance-based analysis
power related analysis and scenario design for early power estimation
deliveries of tests for design and test engineering teams
gate-level verification (power and timing)
lab bring-up support

A significant part of the AMS DV team focuses on research and innovations to improve verification techniques and tools for mixed-signal systems in order to increase efficiency and quality. Looking forward and establishing cutting edge concepts and methods to support them are part of the AMS DV team’s DNA.

Preferred Qualifications
Master´s degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent
Experience in AI/ML is desired
Hands-on experience with Assertion Based Verification
Familiarity with system design using C++, Python or Verilog
Familiarity with FPGA emulation platforms
Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

Minimum Qualifications
Knowledge of System Verilog test-bench language and UVM (Universal Verification Methodology)
Hands-on experience with constrained random verification environments
Basic design background in support of verification results analysis
Knowledge of Object Oriented Programming (OOP)
Proficiency in English language is required

Apply Now

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design verification engineer jobs in hayes, gtl

Experienced AMS Design Verification Engineer

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